• High speed blocks (PLL, DAC, ADC), Networking
  • Power Amplifiers
  • 16nm FinFET, 28nm FDSOI, 20nm dbl pat layout FPGAs
  • Layout of IO and Standard cells
  • Layout of Memories
  • 30+ Engineers
  • Storage, Image Sensors, CPU, Graphics, Networking
  • Design of chips down to 28nm
  • High end Xilinx, Altera and Lattice FPGAs
  • Large ICs, 35 Million+ gates
  • High speed 20+ layers Board Design
  • Board signal and power integrity
  • 60+ Engineers
  • UVM, System Verilog and Assertions (SVA), System C, C++/C
  • PCIe, MIPI, USB, eSPI, HDMI, Networking Protocols
  • VIP and SoC Verification development
  • 30+ Engineers
  • Operating System, Middleware (System C, C++/C)
  • Development and Testing of Drivers
  • TCL, Python, PERL, LabView and GUI development
  • 90+ Engineers